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USB1T1102 * USB1T1102R (Preliminary) Universal Serial Bus Peripheral Transceiver with Voltage Regulator
August 2004 Revised August 2004
USB1T1102 * USB1T1102R (Preliminary) Universal Serial Bus Peripheral Transceiver with Voltage Regulator
General Description
This chip provides a USB Transceiver functionality with a voltage regulator that is compliant to USB Specification Rev 2.0. this integrated 5V to 3.3V regulator allows interfacing of USB Application specific devices with supply voltages ranging from 1.65V to 3.6V with the physical layer of Universal Serial Bus. It is capable of operating at 12Mbits/s (full speed) data rates and hence is fully compliant to USB Specification Rev 2.0. The Vbusmon pin allows for monitoring the Vbus line. The USB1T1102 also provides exceptional ESD protection with 15kV contact HBM on D+, D- pins.
Features
s Complies with Universal Serial Bus Specification 2.0 s Integrated 5V to 3.3V voltage regulator for powering VBus s Utilizes digital inputs and outputs to transmit and receive USB cable data s Supports full speed (12Mbits/s) data rates s Ideal for portable electronic devices s MLP technology package (16 pin) with HBCC footprint s 15kV contact HBM ESD protection on bus pins
Ordering Code:
Order Number USB1T1102MPX USB1T1102RMPX (Preliminary) USB1T1102MHX USB1T1102RMHX (Preliminary) Package Number MLP14D MLP14D MLP16HB MLP16HB Package Description 14-Terminal Molded Leadless Package (MLP), 2.5mm Square 14-Terminal Molded Leadless Package (MLP), 2.5mm Square 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
Logic Diagram
Note: On the USB1T1102R the 1.5k resistor is integrated into the part, and connects VPU and D+ eliminating the need for this external pull-up resistor.
(c) 2004 Fairchild Semiconductor Corporation
DS500877
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USB1T1102 * USB1T1102R (Preliminary)
Connection Diagrams
MLP16 GND Exposed Diepad MLP14 GND Exposed Diepad
(Bottom View)
(Bottom View)
Terminal Descriptions
Terminal Number MLP14 1 MLP16 1 Terminal Name OE I/O I Terminal Description Output Enable: Active LOW enables the transceiver to transmit data on the bus. When not active the transceiver is in the receive mode (CMOS level is relative to VCCIO) Receive Data Output: Non-inverted CMOS level output for USB differential Input (CMOS output level is relative to VCCIO). Driven LOW when SUSPN is HIGH; RCV output is stable and preserved during SE0 condition. Single-ended D+ receiver output VP (CMOS level relative to VCCIO): Used for external detection of SE0, error conditions, speed of connected device; Pin also acts as drive data input Vpo (see Table 1 and Table 2). Output drive is 4 mA buffer. Single-ended D- receiver output Vm (CMOS level relative to VCCIO): Used for external detection of SE0, error conditions, speed of connected device; Pin also acts as drive data input Vmo (see Table 1 and Table 2). Output drive is 4 mA buffer. Suspend: Enables a low power state (CMOS level is relative to VCCIO). While the SUSPND pin is active (HIGH) it will drive the RCV pin to logic "0" state. No Connect Supply Voltage for digital I/O pins (1.65V to 3.6V): When not connected the D+ and D- pins are in 3-STATE. This supply bus is totally independent of VCC (5V) and VREG (3.3V). O Vbus monitor output (CMOS level relative to VCCIO): When Vbus > 4.1V then Vbusmon = HIGH and when Vbus < 3.6V then Vbusmon = LOW. If SUSPND = HIGH then Vbusmon is pulled HIGH. Data +, Data -: Differential data bus conforming to the USB standard. No Connect No Connect Internal Regulator Option: Regulated supply output voltage (3.0V to 3.6V) during 5V operation; decoupling capacitor of at least 0.1 F is required. Regulator ByPass Option: Used as supply voltage input for 3.3V operation. Internal Regulator Option: Used as supply voltage input (4.0V to 5.5V); can be connected directly to USB line Vbus. Regulator ByPass Option: Connected to VREG (3.3V) 2
2
2
RCV
O
3
3
Vp/Vpo
I/O
4
4
Vm/Vmo
I/O
5
5
SUSPND
I
-- 6
6 7
NC VCCIO
7
8
Vbusmon
9, 8 10 -- 11
10, 9 11 12 13
D+, D- NC NC VREG (3.3V)
AI/O
12
14
VCC (5.0V)
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USB1T1102 * USB1T1102R (Preliminary)
Terminal Descriptions
Terminal Number MLP14 13 MLP16 15 Terminal Name VPU (3.3V)
(Continued)
I/O
Terminal Description Pull-up Supply Voltage (3.3V 10%): Connect an external 1.5k resistor on D+ (FS data rate); Pin function is controlled by Config input pin: Config = LOW - VPU (3.3V) is floating (High Impedance) for zero pull-up current. Config = HIGH - VPU (3.3V) = 3.3V; internally connected to VREG (3.3V).
14
16
Config GND
I GND
USB connect or disconnect software control input. Configures 3.3V to external 1.5k resistor on D+ when HIGH. GND supply down bonded to exposed diepad to be connected to the PCB GND.
Exposed Exposed Diepad Diepad
Functional Description
The USB1T1102 transceiver is designed to convert CMOS data into USB differential bus signal levels and to convert USB differential bus signal to CMOS data. To minimize EMI and noise the outputs are edge rate controlled with the rise and fall times controlled and defined for full speed data rates only (12Mbits/s). The rise, fall times are balanced between the differential pins to minimize skew.
The USB1T1102 differs from earlier USB Transceiver in that the Vp/Vm and Vpo/Vmo pins are now I/O pins rather than discrete input and output pins. Table 1 describes the specific pin functionality selection. Table 2 and Table 3 describe the specific Truth Tables for Driver and Receiver operating functions. The USB1T1102 also has the capability of various power supply configurations to support mixed voltage supply applications (see Table 4) and Section 2.1 for detailed descriptions.
Functional Tables
TABLE 1. Function Select SUSPND L L H H OE L H L H D+, D- Driving & Receiving Receiving (Note 1) Driving 3-STATE (Note 1) RCV Active Active Inactive (Note 2) Inactive (Note 2) Vp/Vpo Vpo Input Vp Output Vpo Input Vp Output Vm/Vmo Vmo Input Function Normal Driving (Differential Receiver Active)
Vm Output Receiving Vmo Input Driving during Suspend (Differential Receiver Inactive)
Vm Output Low Power State
Note 1: Signal levels is function of connection and/or pull-up/pull-down resistors. Note 2: For SUSPND = HIGH mode the differential receiver is inactive and the output RCV is forced LOW. The out-of-suspend signaling (K) is detected via the single-ended receivers of the Vp/Vpo and Vm/Vmo pins.
TABLE 2. Driver Function (OE = L) using Differential Input Interface Vm/Vmo L L H H
Note 3: SE0 = Single Ended Zero
Vp/Vpo L H L H TABLE 3. Receiver Function (OE = H) D+, D- RCV H L X Vp/Vpo H L L
Data SE0 (Note 3) Differential Logic 1 Differential Logic 0 Illegal State
Vm/Vmo L H L
Differential Logic 1 Differential Logic 0 SE0
X = Don't Care
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USB1T1102 * USB1T1102R (Preliminary)
Power Supply Configurations and Options
The two modes of power supply operation are: * Normal Mode: VCCIO and VCC (5V) are connected or VCCIO, VCC (5V) and [VREG (3.3V) and VCC (5V) shorted for Bypass mode] 1. For 5V operation VCC is connected to 5V source (4.0V to 5.5V) and the internal voltage regulator then produces 3.3V for the USB connections. 2. For 3.3V operation both VCC and VREG are connected to a 3.3V source (3.0V to 3.6V) In both cases for normal mode the VCCIO is an independent voltage source (1.65V to 3.6V) that is a function of the external circuit configuration. * Sharing Mode: VCCIO is only supply connected. VCC and VREG are not connected. In this mode the D+ and D- pins are 3-STATE and the USB1T1102 allows external signals up to 3.6V to share the D+ and D- bus lines. Internally the circuitry limits leakage from D+ and D- pins (maximum 10 A) and VCCIO such that device is in low power (suspended) state. Pins Vbusmon and RCV are forced LOW as an indication of this mode with Vbusmon being ignored during this state. A summary of the Supply Configurations is described in Table 4.
TABLE 4. Power Supply Configuration Options Pins VCC (5V) Power Supply Mode Configuration Sharing Not Connected Normal (Regulated Output) Connected to 5V Source Normal (Regulator Bypass) Connected to VREG (3.3V) [Max Drop of 0.3V] (2.7V to 3.6V) Connected to 3.3V Source 1.65V to 3.6V Source 3.3V Available if Config = HIGH Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up
VREG (3.3V) VCCIO VPU (3.3V) D+, D- Vp/Vpo, Vm/Vmo RCV Vbusmon OE, SUSPND, Config
Not Connected 1.65V to 3.6V Source 3-STATE (Off) 3-STATE L L L Hi-Z
3.3V, 300 A Regulated Output 1.65V to 3.6V Source 3.3V Available if Config = HIGH Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up
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USB1T1102 * USB1T1102R (Preliminary)
ESD Protection
ESD Performance of the USB1T1102 HBM D+/D-: 15.0kV HBM, all other pins (Mil-Std 883E): 6.5kV ESD Protection: D+/D- Pins Since the differential pins of a USB transceiver may be subjected to extreme ESD voltages, additional immunity has been included in the D+ and D- pins without compromising performance. The USB1T1102 differential pins have ESD protection to the following limits: * 15kV using the contact Human Body Model * 8kV using the Contact Discharge method as specified in IEC 61000-4-2 Human Body Model Figure 1 shows the schematic representation of the Human Body Model ESD event. Figure 2 is the ideal waveform representation of the Human Body Model. IEC 61000-4-2, IEC 60749-26 and IEC 60749-27 The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment, and as such evaluates the equipment in its entirety for ESD immunity. Fairchild Semiconductor has evaluated this device using the IEC 6100-4-2 representative system model depicted in Figure 3. Under the additional standards set forth by the IEC, this device is also compliant with IEC 60749-26 (HBM) and IEC 60749-27 (MM). Additional ESD Test Conditions For additional information regarding our product test methodologies and performance levels, please contact Fairchild Semiconductor. FIGURE 2. HBM Current Waveform
FIGURE 1. Human Body ESD Test Model
FIGURE 3. IEC 61000-4-2 ESD Test Model
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USB1T1102 * USB1T1102R (Preliminary)
Absolute Maximum Ratings(Note 4)
Supply Voltage (VCC)(5V) I/O Supply Voltage (VCCIO) Latch-up Current (ILU) VI = -1.8V to +5.4V DC Input Current (IIK) VI < 0 DC Input Voltage (VI) (Note 5) DC Output Diode Current (IOK) VO > VCC or VO < 0 DC Output Voltage (VO) (Note 5) Output Source or Sink Current (IO) VO = 0 to VCC Current for D+, D- Pins Current for RCV, Vm/Vp DC VCC or GND Current (ICC, IGND) ESD Immunity Voltage (VESD); Contact HBM Pins D+, D-, VCC (5.5V) and GND All Other Pins Storage Temperature (TSTO) Power Dissipation (PTOT) ICC (5V) ICCIO 48 mW 9 mW 15kV 6.5kV 150 mA
-0.5V to +6.0V -0.5V to +4.6V
Recommended Operating Conditions
DC Supply Voltage VCC (5V) I/O DC Voltage VCCIO DC Input Voltage Range (VI) DC Input Range for AI/O (VAI/O) Pins D+ and D- Operating Ambient Temperature (TAMB) 4.0V to 5.5V 1.65V to 3.6V 0V to VCCIO +5.5V 0V to VCC 0V to 3.6V
-50 mA -0.5V to VCCIO +5.5V 50 mA -0.5V to VCCIO + 0.5V
-40C to +85C
50 mA 15 mA 100 mA
Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristic tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 5: IO Absolute Maximum Rating must be observed.
-40C to + 125C
DC Electrical Characteristics (Supply Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC (5V) = 4.0V to 5.5V or VREG (3.3V) = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V Limits Symbol VREG (3.3V) ICC ICCIO ICC (IDLE) ICCIO (STATIC) ICC(SUSPND) Parameter Regulated Supply Output Operating Supply Current (VCC5.0) I/O Operating Supply Current Supply Current during FS IDLE and SE0 (VCC5.0) I/O Static Supply Current Suspend Supply Current USB1T1102 Suspend Supply Current USB1T1102R ICCIO(SHARING) I/O Sharing Mode Supply Current ID+ (SHARING) Sharing Mode Load Current on D+/D- Pins Conditions Min Internal Regulator Option; ILOAD 300 A Transmitting and Receiving at 12 Mbits/s; CLOAD = 50 pF (D+, D-) Transmitting and Receiving at 12 Mbits/s IDLE: VD+ 2.7V, VD- 0.3V; SE0: VD+ 0.3V, VD- 0.3V IDLE, SUSPND or SE0 SUSPND = HIGH OE = HIGH Vm = Vp = OPEN SUSPND = HIGH OE = HIGH Vp = Vm = OPEN VCC (5V) Not Connected VCC (5V) Not Connected Config = LOW; VD = 3.6V 20.0 10.0 A A 40.0 (Note 10) 3.0 (Note 6)(Note 7) 4.0 (Note 8) 1.0 (Note 8) 300 (Note 9) 20.0 25.0 (Note 9) A 2.0 8.0 -40C to +85C Typ 3.3 Max 3.6 V mA mA A A Units
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USB1T1102 * USB1T1102R (Preliminary)
DC Electrical Characteristics
Symbol VCCTH Parameter VCC Threshold Detection Voltage
(Continued)
Limits Conditions Min -40C to +85C Typ Max 3.6 4.1 70.0 mV V Units
1.65V VCCIO 3.6V Supply Lost Supply Present
VCCHYS VCCIOTH
VCC Threshold Detection Hysteresis Voltage VCCIO Threshold Detection Voltage
VCCIO = 1.8V 2.7V VREG 3.6V Supply Lost Supply Present 1.4
0.5
V
VCCIOHYS VREGTH
VCCIO Threshold Detection Hysteresis Voltage Regulated Supply Threshold Detection Voltage
VREG = 3.3V 1.65V VCCIO VREG 2.7V VREG 3.6V Supply Lost Supply Present 2.4 (Note 11)
450
mV
0.8
V
VREGHYS
Regulated Supply Threshold Detection Hysteresis Voltage
VCCIO = 1.8V
450
mV
Note 6: ILOAD includes the pull-up resistor current via pin VPU Note 7: The minimum voltage in Suspend mode is 2.7V. Note 8: Not tested in production, value based on characterization. Note 9: Excludes any current from load and VPU current to the 1.5k resistor. Note 10: Includes current between Vpu and the 1.5k internal pull-up resistor. Note 11: When VCCIO < 2.7V, minimum value for VREGTH = 2.0V for supply present condition.
DC Electrical Characteristics
Symbol Input Levels VIL VIH VOL VOH LOW Level Input Voltage HIGH Level Input Voltage OUTPUT LEVELS: LOW Level Output Voltage HIGH Level Output Voltage Parameter
(Digital Pins - excludes D+, D- Pins)
Limits Test Conditions -40C to +85C Min Max 0.3 0.6*V CCIO IOL = 2 mA IOL = 100 A IOH = 2 mA IOH = 100 A VCCIO - 0.4 VCCIO- 0.15 1.0 (Note 12) 10.0 0.4 0.15 V V Units
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCCIO = 1.6V to 3.6V
V V
Leakage Current ILI Capacitance CIN, CI/O Input Capacitance Pin to GND pF
Note 12: If VCCIO VREG then leakage current will be higher than specified.
Input Leakage Current
VCCIO = 1.65V to 3.6V
A
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USB1T1102 * USB1T1102R (Preliminary)
DC Electrical Characteristics (Analog I/O Pins - D+, D- Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V Limits Symbol Parameter Test Condition Min Input Levels - Differential Receiver VDI VCM VIL VIH VHYS Output Levels VOL VOH LOW Level Output Voltage HIGH Level Output Voltage RL = 1.5k to 3.6V RL = 15k to GND 2.8 (Note 13) 0.3 3.6 V V Differential Input Sensitivity Differential Common Mode Voltage LOW Level Input Voltage HIGH Level Input Voltage Hysteresis Voltage 2.0 0.30 0.7 | VI(D+) - VI(D-) | 0.2 0.8 2.5 0.8 V V V V V -40C to +85C Typ Max Units
INPUT LEVELS - Single-ended Receiver
Leakage Current IOFF CI/O Resistance ZDRV ZIN RSW VTERM Driver Output Impedance Driver Input Impedance Switch Resistance Termination Voltage RPU Upstream Port 3.0 (Note 15) (Note 16) 10.0 10.0 3.6 V 41.0 (Note 14) M Input Leakage Current Off State CAPACITANCE I/O Capacitance Pin to GND 20.0 pF 1.0 A
Note 13: If VOH min. = VREG - 0.2V. Note 14: Includes external resistors of 29 on both D+ and D- pins. Note 15: This voltage is available at pin VPU and V REG. Note 16: Minimum voltage is 2.7V in the suspend mode.
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USB1T1102 * USB1T1102R (Preliminary)
AC Electrical Characteristics (A I/O Pins Full Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V, CL = 50 pF; RL = 1.5K on D+ to VPU Limits Symbol Driver Characteristics tR tF tRFM VCRS (Note 17) Driver Timing tPLH tPHL tPHZ tPLZ tPZH tPZL tPLH tPHL tPLH tPHL Propagation Delay (Vp/Vpo, Vm/Vmo to D+/D-) Driver Disable Delay (OE to D+/D-) Driver Enable Delay (OE to D+/D-) Propagation Delay (Diff) (D+/D- to Rev) Single Ended Receiver Propagation Delay (D+/D- to Vp/ Vpo, V m/Vmo) Figures 5, 8 Figures 7, 9 Figures 7, 9 18.0 15.0 15.0 ns ns ns Output Rise Time Output Fall Time Rise/Fall Time Match Output Signal Crossover Voltage CL = 50 - 125 pF 10% to 90% Figures 4, 8 tF/ tR Excludes First Transition from Idle State Excludes First Transition from Idle State see Waveform 4.0 90.0 1.3 20.0 111.1 2.0 % V 4.0 20.0 ns Parameter Test Conditions Min -40C to +85C Typ Max Unit
Receiver Timing Figures 6, 10 Figures 6, 10 15.0 18.0 ns ns
Note 17: Not production tested, guaranteed by characterization.
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USB1T1102 * USB1T1102R (Preliminary)
Typical Application Configurations
Upstream Connection in Bypass Mode with Differential Outputs
Downstream Connection in Normal Mode with Differential Outputs
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USB1T1102 * USB1T1102R (Preliminary)
AC Waveforms
FIGURE 4. Rise and Fall Times
FIGURE 5. Vpo, Vmo to D+/D-
FIGURE 6. D+/D- to RCV, Vpo/Vp and Vmo/Vm Test Circuits and Waveforms
FIGURE 7. OE to D+/D-
CL = 50 pF Full Speed Propagation Delays CL = -125 pF Edge Rates only
V = 0 for tPZH, tPHZ V = VREG for tPZL
FIGURE 8. Load for D+/D-
FIGURE 9. Load for Enable and Disable Times
FIGURE 10. Load for Vm/Vmo, Vp/Vpo and RCV
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USB1T1102 * USB1T1102R (Preliminary)
Tape and Reel Specification
Tape Format for MLP Package Designator MP/MH Tape Section Leader (Start End) Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) Number Cavities 125 (typ) 2500/3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed
REEL DIMENSIONS inches (millimeters)
Tape Size 12 mm
A 13.0 330
B 0.059 (1.50)
C 0.512 (13.00)
D 0.795 (20.20)
N 7.008 (178)
W1 0.488 (12.4)
W2 0.724 (18.4)
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USB1T1102 * USB1T1102R (Preliminary)
Physical Dimensions inches (millimeters) unless otherwise noted
14-Terminal Molded Leadless Package (MLP), 2.5mm Square MLP14D
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USB1T1102 * USB1T1102R (Preliminary) Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square Package Number MLP16HB
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 14 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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